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An analog 1:16 demultiplexer for time-interleaved A/D-converters with a sampling rate of up to 64 GS/s

机译:用于时间交错A / D转换器的模拟1:16多路分解器,采样率高达64 GS / s

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摘要

An analog current-based 1:16-demultiplexer with integrated sample-and-hold is presented. It is designed in a 28 nm CMOS technology and is the basis for a 16-fold time-interleaved ADC. It offers sampling rates up to 64 GS/s, while consuming only 0.9 W of power and 2.6 mm2 of chip area.
机译:提出了一种基于模拟电流的1:16-CoMultiplexer,具有集成的样本和保持。它以28 nm CMOS技术设计,是16倍时交错ADC的基础。它提供高达64 GS / s的采样率,同时仅消耗0.9W的电源和2.6 mm 2 的芯片区域。

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