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Implementing high speed communication buses for a FPGA-DSP architecture for digital control of power electronics

机译:实现用于数字控制的FPGA-DSP架构的高速通信总线进行电力电子设备

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This paper describes a communication architecture for a digital controller based on DSP-FPGA to be used in power electronic systems. For high rate transmissions, the proposed architecture has an USB bus implemented with a minimum use of the DSP core, using Enhanced Direct Memory Access and External Memory Interface modules of a TMS320C6713 high performance DSP and Cypress EZ-USB SX2 High-Speed USB Interface Device. Moreover, this architecture has CAN-bus communications to expand system with others subsystem, and a Compact Flash interface to storage data and DSP program, improving platform to boot alone. Host side has an application interface programmed in C with multithreading to process all data due high speed transfers.
机译:本文介绍了基于DSP-FPGA的数字控制器的通信架构,用于电力电子系统。对于高速传输,所提出的架构具有USB总线,该母线利用DSP内核的最低使用,使用TMS320C6713高性能DSP和赛普拉斯EZ-USB SX2高速USB接口设备的增强型直接存储器访问和外部存储器接口模块。此外,该体系结构具有CAN总线通信,可扩展与其他子系统的系统,以及存储数据和DSP程序的紧凑型闪光灯接口,改善单独启动平台。主机侧具有在C中编程的应用程序界面,其中多线程以处理所有高速传输的所有数据。

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