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Abetting Planned Obsolescence by Aging 3D Networks-on-Chip

机译:通过老化3D网络进行教唆计划过时

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We set up a security analysis framework by aging the Network-on-Chip (NoC) to study planned obsolescence by the original equipment manufacturer (OEM). An NoC is the communication backbone in a manycore System-on-Chip (SoC). Planned obsolescence may adopt any vulnerability in the NoC to cause the SoC to fail. We show how an OEM can craft workloads to generate electromigration-induced stress and crosstalk noise in TSV-based vertical links in the NoC to hasten failure. We analyzed three malicious workloads and confirm that a crafted workload that injects 3-10% more traffic on to a few selected critical vertical links can shorten the lifetime of the NoC by 11%-25% averaged over the benchmarks considered in this work.
机译:我们通过老化网上(NOC)建立安全分析框架,以研究原始设备制造商(OEM)的计划过时。 NOC是芯片系统上的通信骨干网上(SOC)。计划过时可能采用NOC中的任何漏洞导致SOC失败。我们展示OEM如何制作工作负载,在NOC中基于TSV的垂直链路中产生电迁移诱导的应力和串扰噪声以加速失败。我们分析了三种恶意工作负载,并确认将交通量增加3-10%的制作工作负载,以少数选定的关键垂直链接可以缩短11%-25%在这项工作中考虑的基准中平均的1.25%的生命周期。

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