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A novel state metric normalization technique for high-throughput maximum-a-posteriori-probability decoder

机译:高通量后验概率最大解码器的一种新的状态量度归一化技术

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In this paper, a new state metric normalization technique is proposed for maximum-a-posteriori-probability (MAP) algorithm to enhance the throughput of MAP decoder. Bit-error-rate (BER) performance comparison showed that the MAP algorithm based on the proposed normalization technique has a coding gain of 0.25 dB at a BER of 10−4 in comparison with MAP algorithm based on the subtractive normalization technique. An architecture for MAP decoder based on the new normalization technique has been proposed with a reduced critical path delay as compared to the contributions in literature. Subsequently, a field-programmable-gate-array (FPGA) implementation of the new MAP decoder is carried out. Thereby, the proposed decoder based on non-parallel radix-2 and radix-4 architectures are able to achieve high throughputs of 514 Mbps and 1.028 Gbps respectively.
机译:本文针对最大后验概率(MAP)算法提出了一种新的状态度量规范化技术,以提高MAP解码器的吞吐量。误码率(BER)性能比较表明,与基于MAP的MAP算法相比,基于所提出的归一化技术的MAP算法在BER为10 -4 时具有0.25 dB的编码增益。减法归一化技术。与文献中的贡献相比,已经提出了基于新的归一化技术的用于MAP解码器的架构,其具有减小的关键路径延迟。随后,执行了新MAP解码器的现场可编程门阵列(FPGA)实现。因此,所提出的基于非并行基数2和基数4架构的解码器能够分别实现514 Mbps和1.028 Gbps的高吞吐量。

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