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An Edge-Missing Compensator for Fast-Settling Wide-Locking-Range PLLs

机译:用于快速沉降宽锁定范围PLL的边缘缺失补偿器

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An ideal phase detector (PD) produces an output signal whose DC value is linearly proportional to the phase difference (△θ) between the phases of its two periodic inputs. In practice, however, the transfer curve of the PD may not be linear or even monotonic for large △θ. With a nonlinear PD, the transient response of PLL cannot be easily formulated and slow down the acquisition behavior [1].
机译:理想的相位检测器(PD)产生输出信号,其DC值与其两个周期性输入的相位之间的相位差(△θ)线性成比例。然而,在实践中,PD的传递曲线可能不是线性的甚至是大于θθ的线性甚至单调。利用非线性PD,PLL的瞬态响应不能容易地配制并减慢采集行为[1]。

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