Fully Integrated Low-Drop-Out Regulator Based on Event-Driven PI Control

摘要

Modern SoC designs employ a number of power domains, many of which are often implemented by low-drop-out (LDO) regulators. The key overhead of the existing LDO design is the large off-chip output capacitor (C_(out)) for compensating a large/fast change in load current (I_(LOAD)). Miniaturizing and thus integrating C_(OUT) on a chip is highly desirable and theoretically possible by shortening the control loop latency. This can be achieved by employing a higher sampling frequency (F_(CLK)) in a synchronous time-driven digital LDO [1] and a high-speed amplifier in an analog LDO [2]. However, large power consumption and the resulting low current efficiency are often inevitable. In this work, we aim to break this trade-off between passive size and efficiency by introducing an event-driven (ED) control scheme. We design the level-crossing event detector and the ED PI controller for short latency. The power dissipation is kept small since no event occurs in the steady state. We prototype a 400μA class LDO with typical V_(IN)=0.5V and V_(OUT)=0.45V in 65nm, achieving a small voltage droop (V_(DRDOP)) of 40mV (<9% of set-point voltage [V_(SP)] of 450mV) with an on-chip integrated C_(OUT) of 0.4nF and the peak current efficiency of 96.3%.