首页> 外文会议>IEEE International Solid-State Circuits Conference >A 185fs_(rms)-Integrated-Jitter and -245dB FOM PVT-Robust Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector
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A 185fs_(rms)-Integrated-Jitter and -245dB FOM PVT-Robust Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector

机译:一个185FS_(RMS) - 凝聚抖动和-245dB FOM PVT稳健的环VCO的注射锁定时钟乘法器,具有使用副本延迟单元和双边检测器的连续频率跟踪环路

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An injection-locked clock multiplier (ILCM) is considered to be a promising solution that can generate low-jitter, high-frequency clocks, using a limited budget in terms of silicon area and power consumption. However, an ILCM has a critical problem in that its jitter performance is sensitive to process, voltage, and temperature (PVT) variations. Thus, in general, an ILCM must be equipped with a dedicated PVT-calibrator to mitigate the sensitivity of its performance to PVT variations. One of the most general calibration methods is to use a phase-locked loop (PLL). This method can correct static frequency deviations of a voltage-controlled oscillator (VCO) due to process variations, but it cannot prevent real-time frequency drifts due to temperature or voltage variations [1]. Recently, many efforts have been made to develop new PVT-calibrators, capable of continuous frequency tracking [1-6]. In [1-3], frequency drifts were monitored by a replica-VCO or a delay-locked loop (DLL) that used the same delay cells as the main VCO. However, in these architectures, each calibrator must spend the same amount of the power as the VCO. In addition, mismatches between delay cells limit the calibrating precision or demand an additional calibrating step. References [4-6] presented frequency-tracking loops (FTLs) based on various methods to detect the phase shifts of VCO outputs when reference-pulses are injected. Reference [4] used a time-to-digital converter (TDC) to detect the phase shifts, but it had large power consumption and silicon area due to the many digital circuits. Although the FTL of [5] used a timing-adjusted phase detector (PD), it could suffer from large in-band noise or spurs since the switches of the charge pump (CP) must be on for a considerable duration in every period. In [6], a pulse-gating technique that periodically skipped the injection was presented, but it could generate fractional spurs.
机译:注射锁定时钟乘法器(ILCM)被认为是在硅面积和功耗方面使用有限预算产生低抖动,高频时钟的有希望的解决方案。然而,ILCM具有关键问题,因为其抖动性能对过程,电压和温度(PVT)变化很敏感。因此,通常,ILCM必须配备专用的PVT校准器,以减轻其性能对PVT变化的灵敏度。其中最常规校准方法之一是使用锁相环(PLL)。该方法可以通过处理变化来校正电压控制振荡器(VCO)的静态频率偏差,但由于温度或电压变化,它不能防止实时频率漂移[1]。最近,已经做出了许多努力来开发新的PVT校准器,能够连续频率跟踪[1-6]。在[1-3]中,通过使用与主VCO相同的延迟单元的副本VCO或延迟锁定的环路(DLL)监测频率漂移。但是,在这些架构中,每个校准器必须花费与VCO相同的电量。此外,延迟单元之间的不匹配限制校准精度或要求额外的校准步骤。参考文献[4-6]基于各种方法呈现频率跟踪环(FTL)以在注入参考脉冲时检测VCO输出的相移。参考[4]使用时间到数字转换器(TDC)来检测相移,但由于许多数字电路,它具有大的功耗和硅面积。尽管[5]的FTL使用了时序调整的相位检测器(PD),但是由于电荷泵(CP)的开关在每个时段中必须接通电荷泵(CP)的开关,因此可能遭受大的带内噪声或马刺。在[6]中,呈现了一种脉冲门控技术,呈现了注射的脉冲门控技术,但它可以产生分数马刺。

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