An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler

机译：一个8640 MIPS SOC，通过自动并行化编译器独立断电控制8CCU和8个RAM

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Power efficient SoC design for embedded applications requires several independent power-domains where the power of unused blocks can be turned off. An SoC for mobile phones defines 23 hierarchical power domains but most of the power domains are assigned f

机译：用于嵌入式应用的功率高效SOC设计需要几个独立的电源域，其中可以关闭未使用的块的功率。用于移动电话的SOC定义了23个分层功率域，但大多数电源域都分配了f

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《IEEE International Solid-State Circuits Conference》|2008年||共509页
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Ito M.; Hattori T.; Yoshida Y.; Hayase K.; Hayashi T.; Nishii O.; Yasu Y.; Hasegawa A.; Takada M.; Mizuno H.; Uchiyama K.; Odaka T.; Shirako J.; Mase M.; Kimura K.; Kasahara H.;
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中图分类 TN43-53;
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embedded systems; logic design; microprocessor chips; multiprocessing systems; parallelising compilers; random-access storage; system-on-chip; 8640 MIPS SoC; CPU core; RAM; automatic parallelizing compiler; embedded application; hierarchical power domain; high-perfor;

机译：嵌入式系统;微处理器芯片;多处理系统;并行编译器;随机访问存储;芯片系统;8640 MIPS SOC;CPU核心;RAM;自动并行编译器;嵌入式应用;高级;

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1. Automatic compile-time parallelization of logic programs for restricted, goal level, independent and parallelism [J] . Muthukumar K, Garcia de la Banda M, Hermenegildo M, The Journal of Logic Programming . 1999,第2期

机译：逻辑程序的自动编译时并行化，用于受限，目标级别，独立和并行
2. HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs [J] . Simone Campanoni, Kevin Brownell, Svilen Kanev, Computer architecture news . 2014,第3期

机译：HELIX-RC：用于不规则程序自动并行化的体系结构编译器协同设计
3. Optimizing Code by Selecting Compiler Flags using Parallel Genetic Algorithm on Multicore CPUs [J] . T Satish Kumar, S Sakthivel, Sushil Kumar S International Journal of Engineering and Technology . 2014,第2期

机译：通过在多核CPU上使用并行遗传算法选择编译器标志来优化代码
4. An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler [C] . Ito M., Hattori T., Yoshida Y., IEEE International Solid-State Circuits Conference . 2008

机译：一个8640 MIPS SOC，通过自动并行化编译器独立断电控制8CCU和8个RAM
5. Compiler and Runtime Techniques for Automatic Parallelization of Sequential Applications. [D] . Mehrara, Mojtaba. 2011

机译：顺序应用程序自动并行化的编译器和运行时技术。
6. Effects of closed-loop automatic control of the inspiratory fraction of oxygen (FiO2-C) on outcome of extremely preterm infants – study protocol of a randomized controlled parallel group multicenter trial for safety and efficacy [O] . Christian A. Maiwald, Hendrik J. Niemarkt, Christian F. Poets, 2019

机译：闭环自动控制吸氧分数（FiO2-C）对早产儿结局的影响–一项关于安全性和有效性的随机对照平行分组多中心试验研究方案
7. Automatic compile-time parallelization of logic programs for restricted, goal-level, independent and-parallelism. [O] . Muthukumar Kalyan, Bueno Carrillo Francisco, García de la Banda M., 1999

机译：逻辑程序的自动编译时并行化，用于受限，目标级，独立和并行。
8. Ada Compiler Validation Summary Report: Certificate Number: 890614W1.10099 MIPS Computer Systems, MIPS ASAPP, Version 2.10, MIPS M/120 Host and MIPS R3200-6 CPU Board Target [R] . Maher, J. C., Bailey, R. B., Cruz, R. T., 1989

机译：ada编译器验证摘要报告：证书编号：890614W1.10099 mIps计算机系统，mIps asapp，版本2.10，mIps m / 120主机和mIps R3200-6 CpU板目标

An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler

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