TIME-INTERVAL MEASUREMENT SYSTEM OF HIGH RESOLUTION IMPLEMENTED IN FPGA DEVICE

摘要

This paper describes a new time-interval measurement system of high resolution, which contains sixteen multi-tap delay lines. In practice, during single measuring cycle sixteen time-stamps are registered and collected twice. It means that measured time-interval can be precisely interpolated from collection of time-stamps even after each measuring cycle. This solution leads straight to increase of resolution measurements and to limit total duration time of the measurements. Indirectly, such system architecture leads to decrease of duty cycle of the measurement instrument and limits energy consumption which is particularly important in battery powered systems.