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Some Representations of the S-Box of Camellia in GF(((2~2)~2)~2)

机译:茶花S-Box在GF(((2〜2)〜2)〜2)中的一些表示

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Substitution Box (S-box) is usually the most complex module in some block ciphers. Some prominent ciphers such as AES and Camellia use S-boxes, which are affine equivalents of a multiplicative inverse in small finite fields. This manuscript describes mathematical representations of the Camellia S-box by using composite fields such as polynomial, normal or mixed. An optimized hardware implementation typically aims to reduce the number of gates to be used. Our theoretical design with composite normal bases allows saving gates in the critical path by using 19 XOR gates, 4 AND gates and 2 NOT gates. With composite mixed bases, the critical path has 2 XOR gates more than the representation with composite normal bases. Redundancies found in the affine transformation matrix that form the composite fields were eliminated. For mixed bases, new Algebraic Normal Form identities were obtained to compute the inner composite multiplicative inverse, reducing the critical path of the complete implementation of the Camellia S-box. These constructions were translated into transistor-gate architectures for hardware representations by using Electric VLSI [29] under MOSIS C5 process [17], [18], thus obtaining the corresponding schematic models.
机译:替换盒(S-box)通常是某些分组密码中最复杂的模块。一些著名的密码(例如AES和山茶花)使用S-box,它们在小有限域中是乘法逆的仿射等效项。该手稿通过使用多项式,正态或混合等复合字段,描述了茶花S-box的数学表示形式。优化的硬件实现通常旨在减少要使用的门的数量。我们采用复合法线基极的理论设计允许通过使用19个XOR门,4个AND门和2个NOT门在关键路径中节省门。对于复合混合基,关键路径具有2个XOR门,比复合法向基表示的多。消除了仿射变换矩阵中形成复合场的冗余。对于混合基,获得了新的代数范式恒等式,以计算内部复合乘法逆,从而减少了茶花S-box完整实现的关键路径。通过在MOSIS C5流程[17],[18]下使用Electric VLSI [29],将这些构造转换为用于硬件表示的晶体管门架构,从而获得相应的示意图模型。

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