Reliability LU Appropriate Designs in an HV nLDMOS

摘要

In an nLDMOS,both the drain-side and source-side engineering by adding Nad and Pad layers to obtain a weak snapback characteristic are presented in this work.In this paper,we will detailedly discuss the trigger voltage (Vt1) and holding voltage (Vh) distribution of a novel high-voltage (HV) nLDMOS device.It's a novel method to reduce the Vt1 and to increase the Vh.Therefore,these efforts will be very suitable for the HV applications in power management ICs.