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Gold-doped high resistivity Czochralski-silicon for integrated passive devices and 3D integration

机译:掺金高电阻率直拉硅,用于集成无源器件和3D集成

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We show that deep level doping of Czochralski-grown silicon wafers is capable of providing very high resistivity wafers suitable for integrated passive devices and 3D integration. Starting from n-type Czochralski silicon wafers having a nominal resistivity of 50 Ωcm, we use Au ion implantation to increase the resistivity. Coplanar waveguides fabricated on the wafers show strongly reduced attenuation. Hall measurements indicate that the increase in resistivity is clearly due to a reduction in free carriers. The temperature dependence of the free carrier concentration in the range of 200–350K indicates that the Fermi-level is virtually pinned mid-gap.
机译:我们表明,对Czochralski生长的硅晶片进行深层掺杂能够提供非常高的电阻率晶片,适用于集成的无源器件和3D集成。从标称电阻率为50Ωcm的n型Czochralski硅晶片开始,我们使用Au离子注入来增加电阻率。在晶片上制造的共面波导显示出大大降低的衰减。霍尔测量表明,电阻率的增加显然是由于自由载流子的减少所致。自由载流子浓度的温度依赖性在200–350K范围内,这表明费米能级实际上固定在中间间隙。

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