首页> 外文会议>International symposium on silicon nitride, silicon dioxide, and emerging dielectrics;Meeting of the Electrochemical Society >Impact of Silicon Nitride Gate Dielectric Composition on the Stability of Low Temperature Nanocrystalline Silicon Thin Film Transistors
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Impact of Silicon Nitride Gate Dielectric Composition on the Stability of Low Temperature Nanocrystalline Silicon Thin Film Transistors

机译:氮化硅栅极电介质组成对低温纳米晶硅薄膜晶体管稳定性的影响

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We report on the stability of nanocrystalline silicon (nc-Si) bottom gate (BG) thin film transistors (TFTs) with various compositions ([N]/[Si]) of hydrogenated amorphous silicon nitride (a-SiNx:H) gate dielectric, formed at 280°C. The shift in threshold voltage (△VT) is larger for gate dielectrics with lower [N]/[Si] content. For example, after 5 hours of stressing at 15 V, the △Vt is 0.3 V, 1 V, and 12.4 V for [N]/[Si] of 1.3, 1.2, and 1, respectively. Relaxation tests on the stressed TFTs show that the charge trapping in the gate dielectric is the primary instability mechanism in nc-Si BG TFTs.
机译:我们报告了氢化非晶氮化硅(a-SiNx:H)栅极电介质的各种成分([N] / [Si])的纳米晶体硅(nc-Si)底栅(BG)薄膜晶体管(TFT)的稳定性于280°C形成。对于[N] / [Si]含量较低的栅极电介质,阈值电压(△VT)的变化较大。例如,在15 V的压力下经过5小时后,对于[N] / [Si]分别为1.3、1.2和1,△Vt分别为0.3 V,1 V和12.4V。在受应力的TFT上进行的松弛测试表明,栅电介质中的电荷俘获是nc-Si BG TFT的主要不稳定性机制。

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