FPGA Realization of a Fatigue Detection System Based on the EEG Analysis

摘要

A fatigue detection system based on EEG and it's realization on FPGA were described in this paper, the basic components and the related principles of each module were introduced. The difficulties and innovations in realization on FPGA were given in details as well as some simulation results. This system can be applied to the real-time detecting of drivers' fatigue which can provide forewarning in time. EEG is a kind of weak bioelectricity which is easily interfered by strong noise. The acquired signal passed through a threestage amplifier before AD converter, then the digital signal entered FPGA. There EEG was decomposed using DWT, some coefficients were deposed as random noise, and the signal was reconstructed to the de-noised one. Then according to the relationship between EEG and tiredness, FPGA calculated the fatigue criterion and gave out forewarning when the value was too large.