The new generation of radar has to be equipped with a high performance exciters and receivers to cope with the threat in an Electronic Warfare scenario. The threat in a complex environment with interfering signals requires a reliable signal generation with proper frequency agility and efficient gain controls in receiver units. This is quite cumbersome to achieve in analog domain. Due to digital technology advancements, it is possible to have efficient and high performance Analog-to-Digital converters (ADC), processors, high-density memories and efficient algorithms to realize highly reliable, flexible and upgradeable exciters and receivers. In this design, exciter unit comprises of various digital modules for waveform generation, clocks and synchronization signal generation for different sub-systems of the radar and digital code generation for the frequency to be synthesized. These codes are used to control the Local Oscillators (LOs) output utilized for the up-conversion. In the Receiver unit main focus is on the digital implementation of gain control like sensitivity-time-control (STC), Generation of various controls required by Synthetic noise generator and Automatic Gain Control (AGC) and Digital amplitude Phase Demodulation (DAPD) of down-converted sampled intermediate frequency (IF) signals. This work projects the digital design methodology behind the various modules identified for the Radar Signal Generation and Receiver units. The main highlight of the paper is that the entire design models described are implemented using digital methods using FPGAs. The Xilinx System Generator (XSG) design tool is used to accomplish this, which generates directly the code for a Xilinx FPGA on a target board.
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