High-speed simulation for neuron system base on FPGA

摘要

Method for neuromorphic hardware implementing base on FPGA is researched. The concept of pipeline operator and pipeline model, which can supply a mathematical deduction for realizing the single-core multi-model, is defined. A realization of Morris-Lecar neural model with 12 stages pipeline is accomplished, and the code is embedded into the “Digital Neuromorphic Hardware Platform”. Error analysis for the result has been done in this paper.