Failure analysis of a low yield mixed-signal product due to Deep-Nwell fabrication process marginality

摘要

CMOS Mixed-signal RF product low yield investigation led to the finding of Deep-Nwell (DNW) process and layout marginality. Low yield analysis was carried out by performing electrical failure analysis (EFA) and physical failure analysis (PFA) using junction stain technique. Both process and layout marginality in DNW were evaluated. Post DNW implant photoresist profile assessment has been identified as an effective method on high-energy implantation related process assessment. Possible solutions were proposed to resolve the low yield issue.