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Design and FPGA implementation of flexible and efficiency digital down converter

机译:灵活高效的数字下变频器的设计和FPGA实现

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Digital down converter (DDC) is the one of the key technologies in the field of software define radio (SDA). Compared with traditional ASIC DDC devices, DDCs implemented by FPGA have more flexible frequency and phase characteristics and higher precision computation. The paper designed and implemented DDC with above advantages on Xilinx FPGA Virtex-5. Through analyzing the key points of DDC theory and MATLAB simulation analysis, DDC with across clock region and FIFO interface characteristics is designed using Xilinx ISE. Some important and practical implementation details are given in this paper. And finally presents one application of DDC in communication systems by the portions given in this document.
机译:数字下变频器(DDC)是软件无线电(SDA)领域的关键技术之一。与传统的ASIC DDC器件相比,由FPGA实现的DDC具有更灵活的频率和相位特性以及更高的计算精度。本文在Xilinx FPGA Virtex-5上设计并实现了具有上述优势的DDC。通过分析DDC理论的要点和MATLAB仿真分析,使用Xilinx ISE设计了具有跨时钟区域和FIFO接口特性的DDC。本文给出了一些重要且实际的实现细节。最后,通过本文档中给出的部分介绍了DDC在通信系统中的一种应用。

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