An integrated segmented gate driver with adjustable driving capability

摘要

The effect of varying the driving strength of the gate driver IC on the efficiency of synchronous buck converters is the focus of this work. To reduce the switching losses in the output stage, gate drivers are often designed to charge and discharge the gate electrodes of the power MOSFETs as fast as possible. However, fast switching requires power hungry gate drivers and the gate driver power consumption could exceed the switching loss at light load. In this work, a segmented gate driver IC with adjustable driving capability is presented. By choosing the appropriate gate driving capability for each particular load condition, it is possible to continuously optimize the overall power conversion efficiency. In a 20W DC-DC converter, regulated at 1.2V, 0–20A output, a 7% efficiency improvements at light load and significant reduction in ringing and overshoot at the switching node is achieved with the proposed 0.25µm CMOS compatible gate driver IC.