Mixed AC/DC-coupled averaging technique for ADC nonlinearity reduction

摘要

A new combined AC/DC-coupled output averaging technique for input amplifier design of flash analog-to-digital converters (ADC) is presented. The new offset averaging design technique takes full advantages of traditional DC-coupled resistance averaging and AC-coupled capacitance averaging techniques to minimize offset-induced ADC nonlinearities. Circuit analysis allows selection of optimum resistance and capacitance averaging factors to achieve maximum offset reduction in ADC designs. The new averaging method was verified in designing a 4bits 1Gs/s flash ADC that was implemented in foundry 0.13μm CMOS technology.