In this paper, a new peak hold circuit which detects the top value and the bottom value of the power supply noise of a VLSI circuit is proposed. We can make a noise map by distributing the circuit over the chip and find hot-spots in which large power supply noise occurs. This circuit needs no extra clean power supply or external clock signal. Also, low power consumption can be expected because it is composed simple and small. Our circuit can hold both the top peak value and bottom peak value by changing only one gate logic. Moreover, our circuit has a mechanism of DC offset cancellation. This circuit has a resolution of 10mV at 100MHz. The output value from two or more circuits can be transmitted via a shared single wire. HSPICE simulation using a 0.18µm CMOS process technology validates its operation.
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