Design and implementation of high-speed CCD driving circuit based on CPLD

摘要

In CCD detecting system of dynamic target, the design of high speed CCD driving circuit is a key technique in its application. This paper, taking CCD IL-P3 produced by DALSA Company recently for example, according to the demands of CCD driving timing, introduces a designing method of high speed CCD driving circuit. A CPLD device of ALTERA Company's MAX7000S series is chosen as a hardware carrier to design the driving timing generator with adjustable exposure time. After compiled and simulated in MAX+PLUSII, the program is fitted into the CPLD device by using JTAG interface. And experimental results show that the expected CCD driving plus signals can be get.