MULTI-CORE PROCESSOR BASED ON LEON3-FT IP CORE (LEON3-FT-MP)

摘要

This paper summarizes the development,verification and validation of a multi-core processor system (LEON3-FT-MP) based on the LEON3-FT IP core. The work was performed by Gaisler Research under ESA contract during the period from September 2005 to April 2006. The project is preparation for the Next generation ESA microprocessor called GINA (Giga Instruction Architecture) which has ambition to provide 1,000 MIPS/MFLOPS in a single device. Verification and validation platform consisting of cation multi-processing syst system based on LEON3-FT and GRFPU IP cores was successfully developed.Faulttolerant and multi multi-processing capabilities of LEON3-FT, GRFPU and additional IP cores from Gaisler Research have been demonstrated and validated.