Total Software Solution for CMP Yield Enhancement

摘要

Chemical Mechanical Polishing (CMP) has become the enabling planarization technology for the deep-submicron, multi-layer metallization. However, the dielectric thickness dependency on the underlying metal density in CMP limits its yield during IC manufacturing. In order to alleviate this pattern-dependency, floating dummy metals are often inserted in open spaces and metal density variation is minimized. These floating metals, however, increase wire capacitances and can significantly disturb the circuit timing closure. A noble total software solution has been proposed and implemented to resolve the conflict between CMP planarity and circuit timing closure.