Measuring the Routing Costs of FPGA Circuit Components

摘要

Developers of reconfigurable computing systems rely on libraries of complex circuit components to create high-performance reconfigurable applications. Such components are routinely characterized by their size and clock rate. Circuit size is usually measured in terms of technology dependent logic resources such as the configurable logic block (CLB) or logic elements (LE). Although such measures are useful in evaluating the relative size and timing of various configurable logic objects, they may overlook the system impact of the object. Such measures ignore the routing requirements and impact of placement a circuit component may have on the overall FPGA design. This paper will introduce a simple measure to quantify the interconnect requirements of reconfigurable circuit objects. The measure will be demonstrated using several example circuits.