FAULT-TOLERANT AND HIGH PERFORMANCE COMPUTING WITH DYNAMICALLY RECONFIGURABLE FPGAS

摘要

The design of computer-based systems requires careful consideration of hardware/software tradeoffs to maximize performance while minimizing cost. Previously, only the most frequently used operations had the cost justification for performing them in hardware, but now Field-Programmable Gate Arrays (FPGAs) can be reconfigured on-the-fly to perform a variety of operations directly in hardware. The architecture presented in this paper uses dynamic reconfigurability to support fault tolerance and multiprocessing in a flexible and judicious manner. In the domain of fault-tolerant and parallel computing, we demonstrate the acceleration of applications by our architecture using a versatile FPGA.