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Efficient Microarchitecture Modeling and Path Analysis for Real-Time Software

机译:实时软件的高效微体系结构建模和路径分析

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Real-time systems are characterized by the presence of timing constraints in which a task must be completed within a specific amount of time. This paper examines the problem of determining the bound on the worst case execution time (WCET) of a given program on a given processor. There are two important issues in solving this problem: (i) program path analysis, which determines what sequence of instructions will be executed in the worst case, and (ii) microarchitecture modeling, which models the hardware system and determines the WCET of a known sequence of instructions. To obtain a tight estimate on the bound, both these issues must be addressed accurately and efficiently. The latter is becoming difficult to model for modern processors due to the presence of pipelined instruction execution units and cached memory systems.Because of the complexity of the problem, all existing methods that we know of focus only on one of above issues. This limits the accuracy of the estimated bound and the size of the program that can be analyzed. We present a more effective solution that addresses both issues and uses an integer linear programming formulation to solve the problem. This solution is implemented in the program Cinderella which currently targets the Intel i960KB processor and we present some experimental results of using this tool.
机译:实时系统的特点是存在计时约束,其中必须在特定时间内完成任务。本文研究确定给定处理器上给定程序的最坏情况执行时间(WCET)的界限的问题。解决此问题有两个重要问题:(i)程序路径分析,用于确定在最坏情况下将执行哪些指令序列;(ii)微体系结构建模,用于对硬件系统进行建模并确定已知的WCET指令顺序。为了获得关于边界的严格估计,必须准确而有效地解决这两个问题。由于存在流水线指令执行单元和缓存的内存系统,后者对于现代处理器的建模变得越来越困难。 由于问题的复杂性,我们已知的所有现有方法仅关注上述问题之一。这限制了估计范围的准确性和可以分析的程序的大小。我们提出了一个更有效的解决方案,可以解决这两个问题,并使用整数线性规划公式来解决该问题。该解决方案在目前针对Intel i960KB处理器的Cinderella程序中实现,我们提供了使用此工具的一些实验结果。

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