首页> 外文会议>International symposium on broadcasting technology;ISBT'95 >VLSI ARCHITECTURE OF SINGLE CHIP MPEG AUDIO DECODER FOR DAB
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VLSI ARCHITECTURE OF SINGLE CHIP MPEG AUDIO DECODER FOR DAB

机译:DAB的单芯片MPEG音频解码器的VLSI体系结构

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With the development of Digital Audio Broadcasting (DAB), a large number of DAB receivers will be needed, so the Application Specific Integrated Circuits in DAB receivers must be designed and fabricated. In DAB, the ISO/MPEG-Audio Layer II standard(MUSICAM) is used as the source coding algorithm. In this paper, the MUSICAM decoder is analyzed, and in order to obtain the optimum VLSI implementation for the MUSICAM decoder, a decoder hardware algorithm is developed. Base on the hardware algorithm and the tradeoff among speed, accuracy and cost, a feasible VLSI architecture of single chip MPEG audio decoder for DAB is designed and verified by VHDL/Logic simulation.
机译:随着数字音频广播(DAB)的发展,将需要大量的DAB接收器,因此必须设计和制造DAB接收器中的专用集成电路。在DAB中,ISO / MPEG-Audio Layer II标准(MUSICAM)被用作源编码算法。本文对MUSICAM解码器进行了分析,为获得MUSICAM解码器的最佳VLSI实现,开发了一种解码器硬件算法。基于硬件算法,并在速度,精度和成本之间进行权衡,设计了一种可行的DAB单片MPEG音频解码器VLSI架构,并通过VHDL / Logic仿真进行了验证。

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