CMOS combinational circuits exhibit sequential behavior in the presence of open faults, thus making it necessary to use two pattern tests. Two or multi-pattern sequences may fail to detect CMOS stuck-open faults in the presence of glitches. The available methods for augmenting CMOS gates to test CMOS stuck-open faults, are found to be inadequate in the presence of glitches. A new CMOS testable design is presented. The scheme uses two additional MOSFETs, which convert a CMOS gate to either pseudo nMos or pseudo pMOS gate during testing. The proposed design ensures the detection of stuck-open faults using
机译:BiCMOS电路的可测试设计,用于使用单个模式进行开路故障检测
机译:改进的IDDQ可测试性设计技术,可检测CMOS卡死故障
机译:从完整的测试集中计算最佳测试序列,以解决CMOS电路中的开路故障
机译:使用单个测试图样测试CMOS电路中的开路故障
机译:测试生成和评估CMOS VLSI电路中的桥接故障。
机译:使用单个RGB-IR CMOS传感器进行多色荧光成像用于通过smURFP标记的益生菌进行癌症检测
机译:CMOS组合电路中的卡住开放故障的高效自动测试图案发生器
机译:CmOs IC卡住开路故障的电气测量。