Four-way processor 800 MT/s front side bus with ground referenced voltage source I/O

摘要

A 40cm multi-drop bus shared by 5 test chips to emulate 4 processors and a chipset runs error free at 8OOMT/s with 13OmV margin using Ground Referenced Voltage Source (GRYS) I/& scheme. For comparison, when the same test chip is programmed to use Gunning Transceiver Logic (GTL), the bus speed is 500 MT/s for the same 13OmV margin under identical conditions.