首页> 外文会议>Solid-state Circuits Conference, 1987. ESSCIRC '87 >A CMOS Analog Continuous-Time Delay-Line
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A CMOS Analog Continuous-Time Delay-Line

机译:CMOS模拟连续时间延迟线

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摘要

A current-domain first-order all-pass filter-section has been developed, composed of a single capacitor and CMOS circuits with linear resistive input impedance, based on the square-law characteristic of an MOS transistor in saturation. Experimental verification has been performed by means of an integrated cascade of 26 identical all-pass sections acting as a continuous-time delay-line.
机译:基于饱和状态下MOS晶体管的平方律特性,已开发出一种电流域一阶全通滤波器部分,该部分由单个电容器和具有线性电阻性输入阻抗的CMOS电路组成。实验验证是通过将26个相同的全通段作为一个连续时间延迟线的集成级联进行的。

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