首页> 外文会议>Solid-state Circuits Conference, 1987. ESSCIRC '87 >10MHz 64 Bit Error Tolerant Signature Recognition Circuit
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10MHz 64 Bit Error Tolerant Signature Recognition Circuit

机译:10MHz 64位容错签名识别电路

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This paper a circuit will be presented which identifies a 64 bit synchronization word in a serial incoming data stream. The signature is identified when the incoming data stream matches a previously known and stored signature. It is also possible to program the number of bit errors permissible for recognition of the signature. The circuit was fabricated in a 1.5¿m CMOS technology for use in a D2MAC television decoder. The circuit operates at data rates up to 20MHz and covers an area of 1.4 × 0.1 mm2
机译:本文将介绍识别串行输入数据流中的64位同步字的电路。当输入数据流与先前已知和存储的签名匹配时,签名被识别。还可以对允许识别签名的位数进行编程。该电路采用1.5μmCMOS技术制造,用于D2MAC电视解码器。该电路以高达20MHz的数据速率工作,覆盖面积为1.4×0.1mm 2

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