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IDA

机译:国际开发协会

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摘要

A delay analysis program has been developed to compute the signal propagation delays attributed to RC interconnection nets in integrated circuits. To take into account the bidirectional nature of MOS transmission gates, the program simulates nets connected through transmission gates as single entities refered to as "supernets". In order to obtain a single set of realistic lumped delays for nets with transmission gates, a delay path analysis and reduction algorithm is used.

机译:已经开发了延迟分析程序来计算归因于集成电路中RC互连网络的信号传播延迟。考虑到MOS传输门的双向特性,该程序将通过传输门连接的网络模拟为单个实体,称为“超网”。为了获得具有传输门的网络的一组实际的集总延迟,使用了一种延迟路径分析和归约算法。

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