SPEAC

摘要

In the high data rate systems ( MHz) associated with signal processing, a standard stored program computer is not fast enough. At the present time, parallel (1, 2) and pipeline (3) architectures are being used to solve these computational problems.This paper describes a preprocessor which is optimized to perform sum-of-product operations with a "pipeline ripple through" architecture. A breadboard built to perform the "absolute difference" and "product" correlation functions using this architecture is described.