Addressing the Broadband Crosstalk Challenges of Pogo Pin Type Interfaces for High-Density High-Speed Digital Applications

摘要

Input-output (I/O) cells in integrated circuit devices (ICs) are pushing data-rates to speeds of 5 Gb/s and above with an ever increasing number of pins. This is creating significant challenges for the automated test equipment (ATE) industry to develop appropriate interfaces that provide the needed performance. This article discusses crosstalk issues in high density, high performance ATE interconnects which usually include pogo pin type interfaces, mixed-dielectric printed circuit board (PCB) stack-ups with long differential traces, and innovative pogo/PCB via geometries. To demonstrate the crosstalk challenge and how to address it, a pogo pin assembly and pogo via design is analyzed as an example. This practical approach addresses aspects of creating the high performance interconnect such as pogo and PCB design issues, EM modeling, and measurements.