We discuss the line planning problem as it appears in a large semiconductor back-end. The line planning is a short-term planning phase in a hierarchical production planning approach. We highlight its major objectives and constraints as well as outline a manual solution procedure. The solution procedure consists of the phases package planning and device planning. Due to an ongoing increase in the complexity and size of the line planning problem, the manual solution procedure reaches its limitations. This is especially the case for the more detailed device planning. Hence, we present a prototype of a mathematical mixed integer program (MIP) model formulation as a starting point for a more automated optimization approach.
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