A CMOS PLL-based frequency synthesizer for wireless communication systems at 0.9, 1.8, 1.9 and 2.4 GHz

摘要

In this paper, a phase-locked loop (PLL)-based frequency synthesizer was developed for wireless communication applications at 900 MHz, 1800 MHz, 1900 MHz and 2.4 GHz. In order to generate wide-range oscillation signals in the desired frequency bands, a range-programmable voltage-controlled oscillator (RP-VCO) consisting of several controllable inverter rings in parallel was designed. By adjusting the ratios of programmable dividers, and selecting the number of paralleled inverter rings of the RP-VCO, the desired frequency can be generated as demanded by the application system. Instead of using several synthesizers for different frequency bands, only a synthesizer proposed herein can generate these frequency bands in a cost-effective way. By using the TSMC 1P4M 0.35 /spl mu/m CMOS technology, the proposed PLL-based frequency synthesizer could yield oscillation signals ranging from 822 MHz to 967 MHz, from 1752 MHz to 1874 MHz, from 1849 MHz to 1933 MHz and from 2356 MHz to 2503 MHz at a supply voltage of 3.3 V. Power dissipation is proportional to the output frequency with 11.6 mW to 35.3 mW. Therefore, the proposed frequency synthesizer could be widely used in various integrated communication systems, providing different oscillation signals in cost-effective and power-efficient manners.