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A symbolic approach for testability evaluation in fault diagnosis of nonlinear analog circuits

机译:非线性模拟电路故障诊断中可测性评估的一种符号方法

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摘要

A symbolic approach for testability evaluation in fault diagnosis of nonlinear analog circuits is presented. The new approach extends the methodologies developed for the linear case to circuits where nonlinear components, such as diodes or transistors, are present. The testability evaluation is a fundamental information for the fault diagnosis process, whatever method will be used, also in the nonlinear case. An example of circuit verifying this consideration and the validity of the proposed approach is briefly presented.
机译:提出了一种用于非线性模拟电路故障诊断中可测性评估的符号方法。新方法将针对线性情况开发的方法扩展到存在非线性组件(例如二极管或晶体管)的电路。可测试性评估是故障诊断过程的基本信息,无论使用哪种方法,在非线性情况下也是如此。简要介绍了一个验证该考虑和所提出方法的有效性的电路示例。

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