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A 0.9-V 0.2-/spl mu/W CMOS single-opamp-based switched-opamp /spl Sigma//spl Delta/ modulator for pacemaker applications

机译:基于0.9V 0.2- / spl mu / W CMOS单运放的开关运放/ spl Sigma // spl Delta /调制器,用于起搏器应用

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A 3/sup rd/-order lowpass /spl Sigma//spl Delta/ modulator operating with a 0.9-V supply voltage is realized with a standard 0.35-/spl mu/m CMOS process. To achieve ultra-low-power and tiny-chip-area design, single-opamp-based /spl Sigma//spl Delta/ modulator architecture is proposed and implemented with switched-opamp technique. Employing a novel opamp design with three switching output pairs, the /spl Sigma//spl Delta/ modulator achieves a SNR of 75dB at an ultra low power consumption of 0.2/spl mu/W, which is more than an order lower than existing designs.
机译:使用标准的0.35- / SPL MU / M CMOS工艺实现3 / SUP RD / -ORDER LOWPASS / SPL SIGMA // SPL DELTA /调制器操作,使用0.9V电源电压。为了实现超低功耗和微小芯片区域设计,提出了用开口opamp技术提出并实现了基于Opamp的/ SPL Sigma // SPL Delta /调制器架构。采用具有三个开关输出对的新型OPAMP设计,/ SPL Sigma // SPL Delta /调制器在0.2 / SPL MU / W的超低功耗下实现75dB的SNR,这比比现有设计低的订单。

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