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Using Multi-Objective Evolutionary Algorithm in PLD Model to Implement the Automatic Design of Logic Circuits

机译:利用PLD模型中的多目标进化算法实现逻辑电路的自动设计

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Fault tolerance in circuit design and evolutionary design of circuit is a new focus in recent research work, with the idea of evolvable hardware, this paper has described a novel PLD model with multi-objective evolutionary algorithm(MOEA) for auto-design of circuits. Using this method, after coding and decoding, which can design new circuits automatically. In this paper, it has added new fault tolerance mechanism, when the error occurred, the model can also use the rest of resource with our MOEA to design the perfect circuits. From the analysis of a few experiments, it has proved the PLD model with MOEA is effective to meet the need of auto-design of circuits with fault tolerance.
机译:电路设计和电路演化设计中的容错性是近年来研究工作的一个新焦点,以可进化的硬件思想为基础,描述了一种新颖的具有多目标进化算法(MOEA)的PLD模型,用于电路的自动设计。使用这种方法,经过编码和解码后,可以自动设计新电路。在本文中,它添加了新的容错机制,当发生错误时,该模型还可以利用我们的MOEA中的其余资源来设计理想的电路。通过一些实验的分析,证明了采用MOEA的PLD模型可以有效地满足具有容错能力的电路的自动设计需求。

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