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Parallel FPGA-based all-pairs shortest-paths in a directed graph

机译:有向图中基于并行FPGA的全对最短路径

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With rapid advances in VLSI technology, field programmable gate arrays (FPGAs) are receiving the attention of the parallel and high performance computing community. In this paper, we propose a highly parallel FPGA design for the Floyd-Warshall algorithm to solve the all-pairs shortest-paths problem in a directed graph. Our work is motivated by a computationally intensive bio-informatics application that employs this algorithm. The design we propose makes efficient and maximal utilization of the large amount of resources available on an FPGA to maximize parallelism in the presence of significant data dependences. Experimental results from a working FPGA implementation on the Cray XD1 show a speedup of 22 over execution on the XD1's processor.
机译:随着VLSI技术的飞速发展,现场可编程门阵列(FPGA)受到并行和高性能计算界的关注。在本文中,我们为Floyd-Warshall算法提出了高度并行的FPGA设计,以解决有向图中所有对的最短路径问题。我们的工作是由采用此算法的计算密集型生物信息学应用程序激发的。我们提出的设计可以有效且最大程度地利用FPGA上的大量资源,以在存在大量数据依赖性的情况下最大程度地提高并行度。在Cray XD1上有效的FPGA实现的实验结果表明,与在XD1的处理器上执行相比,执行速度提高了22倍。

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