Software methodologies for VHDL code static analysis based on flow graphs

摘要

At a high level of abstraction, the VHDL specification of the functionalities that a circuit shall perform is given by defining the behavioral model. The similarity with procedural programming languages suggested to tailor some software analysis techniques to VHDL behavioral description analysis. The paper presents several analyses of the code, based on data flows, aimed at identifying significant properties of the final circuit from the synthesis and testability points of view.