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A 1.3 V op/amp in standard 0.7 /spl mu/m CMOS with constant g/sub m/ and rail-to-rail input and output stages

机译:标准0.7 / spl mu / m CMOS中的1.3 V运算放大器,具有恒定的g / sub m /和轨至轨输入和输出级

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A fundamental analog building block is the operational amplifier. A low-voltage CMOS op amp must operate with supply voltages down to 1.5 V. The circuit architecture must maintain typical performance of a generic op amp. Other main features are: rail to rail input voltage range with constant g; rail to rail output voltage range; low-power consumption; high DC voltage gain; large GBW; high CMRR and PSRR; high slew rate etc. To realise this, the authors present a chip which uses 0.7 /spl mu/m CMOS technology with 1.2 /spl mu/m minimum channel length and standard 0.7 V thresholds. The circuit operates down to 1.3 V, the lowest supply voltage that can be achieved with threshold voltages of about 0.7 V.
机译:一个基本的模拟构建块是运算放大器。低压CMOS运算放大器必须在低至1.5 V的电源电压下工作。电路架构必须保持通用运算放大器的典型性能。其他主要特征是:恒定g的轨到轨输入电压范围;轨至轨输出电压范围;低功耗;高直流电压增益;大GBW;高CMRR和PSRR;为了实现这一点,作者提出了一种使用0.7 / spl mu / m CMOS技术的芯片,该芯片具有1.2 / spl mu / m的最小通道长度和标准的0.7 V阈值。该电路的工作电压低至1.3 V,这是在约0.7 V的阈值电压下可以达到的最低电源电压。

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