This paper addresses the problems of diagnosing multiple faults occuring in the non-boundary-scan parts of a printed circuit board. The paper details a diagnostic algorithm based upon combining the fault signatures of single faults in order to produce a pattern which best matches the signature of a multiple fault. In addition, a graphical routine is presented which allows the tester to analyze a given set of test vectors. This analysis provides an implicit fault-simulation process for stuck-at and bridging faults. Furthermore, the process informs the tester of any faults which mask other previously detectable faults within the given test set.
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