The synergistic effect of thread scheduling and caching in multithreaded computers

摘要

The author investigates combining two techniques-thread scheduling and context switching on cache misses-in a multithreaded computer. By means of a simple simulation model for an eight-stage pipeline, it is demonstrated that these two techniques act together to allow higher overall processor performance with fewer running threads than the number of pipeline stages. Thus, two of the problems with multithreaded machines-a large number of required threads and poor cache performance-are reduced.