A single-chip 266 Mb/s CMOS transmitter/receiver for serial data communications

摘要

A single-chip 266-Mb/s CMOS transceiver that fully meets emerging ANSI Fibre Channel standards is described. All required functions specified in the FC-0 layer are integrated: on-chip phase-locked loops (PLL) for clock generation and recovery, a 10-channel time-division multiplexer and demultiplexer for fast parallel-to-serial and serial-to-parallel conversion, and word alignment logic. In addition, this device has on-chip CMOS emitter-coupled logic (ECL) receivers and drivers for high-speed serial input/output (I/O). Depending on the choice of medium, this chip can drive a coaxial cable directly or interface with an optical transceiver for fiber-optic connections.