首页> 外文会议> >Boolean matching using binary decision diagrams with applications to logic synthesis and verification
【24h】

Boolean matching using binary decision diagrams with applications to logic synthesis and verification

机译:使用二进制决策图进行布尔匹配,并将其应用于逻辑综合和验证

获取原文

摘要

An algorithm for Boolean matching based on binary decision diagrams using a level-first search strategy is presented. This algorithm is generally not restricted to circuits with just a few inputs and can be used for both technology mapping and logic verification. Unlike depth-first and breadth-first strategies, a level-first strategy permits significant pruning of the search space. A set of filters that further improve the performance of the matching algorithm is described. A method of analyzing the effectiveness of a filter is presented, and the various filters are ranked on the basis of their effect/cost ratio. Experimental results on a number of benchmark circuits are presented, comparing the basic matching algorithm with and without the use of various filters. It is shown how the matching algorithm and the filters can be extended to Boolean functions with don't cares.
机译:提出了一种基于二进制决策图的布尔匹配算法,该算法使用级别优先的搜索策略。该算法通常不限于只有几个输入的电路,并且可以用于技术映射和逻辑验证。与深度优先和广度优先策略不同,级别优先策略允许对搜索空间进行大量修剪。描述了一组进一步改善匹配算法性能的过滤器。提出了一种分析过滤器有效性的方法,并根据其效果/成本比对各种过滤器进行了排名。给出了许多基准电路的实验结果,比较了使用和不使用各种滤波器的基本匹配算法。展示了如何轻松地将匹配算法和过滤器扩展为布尔函数。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号