The effects of gate to channel breakdown on the operation of BiCMOS logic gates are described. Both the static and dynamic behaviors of the gates are examined. The results of a SPICE simulation are presented. They show that gate to channel breakdown cannot be modeled by a stuck-at fault. I/sub ddq/ and delay testings are effective in detecting these defects. Test patterns for I/sub ddq/ are given.
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机译：描述了栅极到沟道击穿对BiCMOS逻辑门操作的影响。闸门的静态和动态行为均得到检查。给出了SPICE仿真的结果。他们表明，通道到通道的击穿不能用故障卡定来建模。 I / sub ddq /和延迟测试可有效检测这些缺陷。给出了I / sub ddq /的测试模式。
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