首页> 外文会议> >On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
【24h】

On variable ordering of binary decision diagrams for the application of multi-level logic synthesis

机译:关于二进制决策图的变量排序在多级逻辑综合中的应用

获取原文

摘要

Develops multi-level logic minimization programs using binary decision diagram (BDD). The authors present variable ordering methods of BDD. The variable ordering algorithm for two-level circuits is based on cover patterns and selects most binate variables first, and the one for multi-level circuits is based on depth first traverse of circuits. In both cases, the acquired variable orderings are optimized by exchanging a variable with its neighbor in the ordering.
机译:使用二进制决策图(BDD)开发多级逻辑最小化程序。作者介绍了BDD的变量排序方法。用于两级电路的变量排序算法基于覆盖图并首先选择大多数二进制位变量,而用于多级电路的变量排序算法则基于电路的深度优先遍历。在这两种情况下,都可以通过在顺序中与其附近的变量交换变量来优化获取的变量顺序。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号