首页> 外文会议>ISCAS 2012;IEEE International Symposium on Circuits and Systems >Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers
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Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers

机译:多通道光纤接收器中时间交错ADC的联合采样时间误差和通道偏斜校准

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A joint sampling-time error and channel skew background calibration technique for time interleaved analog to digital converters (TI-ADC) is presented. The technique is aimed at applications in dual-polarization QPSK/QAM receivers for coherent optical communications at high data rates (e.g., 40Gb/s and beyond). Unlike previous proposals, the calibration algorithm introduced here is used to jointly compensate for sampling-time and channel skew errors. Estimates of the gradient of the mean squared error (MSE) or the bit error rate (BER) with respect to the sampling phases of the different signal lanes and interleaves are computed and used to iteratively minimize a cost function (i.e., MSE or BER). Computer simulations demonstrate the excellent behavior of the proposed compensation technique. The calibration algorithm can be implemented with minimal hardware requirements and with a slow clock. This allows power dissipation in a CMOS VLSI implementation to be minimized.
机译:提出了一种用于时间交错模数转换器(TI-ADC)的联合采样时间误差和通道偏斜背景校准技术。该技术旨在用于双极化QPSK / QAM接收器中的应用,以实现高数据速率(例如40Gb / s及更高)的相干光通信。与先前的建议不同,此处介绍的校准算法用于共同补偿采样时间和通道偏斜误差。计算相对于不同信号通道和交错的采样相位的均方误差(MSE)或误码率(BER)的梯度估计,并将其用于迭代地最小化成本函数(即MSE或BER) 。计算机仿真证明了所提出的补偿技术的优异性能。可以以最少的硬件要求和较慢的时钟实现校准算法。这可以使CMOS VLSI实现中的功耗最小化。

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